Description
Dec 28, 2015 The 74HC138 ; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). 74HC138 . 3 TO 8 LINE DECODER DEMULTIPLEXER. Description. The 74HC138 is a high speed CMOS device. The device accepts a three bit binary weighted www.fairchildsemi.com. 2. MM. 74HC138 . Truth Table. H = HIGH Level, L = LOW Level, X = dont care. Note 1: G2 = G2A+G2B. Logic Diagram. Inputs. Outputs. Jan 26, 2015 The 74HC138 -Q100; 74HCT138-Q100 decodes three binary weighted address inputs. (A0, A1 and A2) to eight mutually exclusive outputs (Y0
Part Number | 74HC138 |
Brand | Renesas |
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74HC138
RENESAS/NEC
100
4.46
Ulike electronics co.,Limited
74HC138
RENRSAS
200
1.19
HK Rhoda Technology Co., Limited
74HC138
rene
1210
2.0075
Nosin (HK) Electronics Co.
74HC138
ren
1059
2.825
Xinshop Electronics Co.,Ltd.
74HC138
RENESA
311002
3.6425
Cicotex Electronics (HK) Limited